WATCH: Minister Ashwini Vaishnaw’s masterclass on semiconductor ecosystem
Ashwini Vaishnaw's video has gone viral after the Union Cabinet approved the establishment of three more semiconductor plants – two by Tatas and one in Assam – that will start construction within the next 100 days.
- Mar 1, 2024,
- Updated Mar 1, 2024 9:29 AM IST
A video of Information Technology Minister Ashwini Vaishnaw explaining India’s semiconductor ecosystem on a whiteboard has gone viral. The video, over 4-minute long, shows Vaishnaw explaining his ministry working to create a robust semiconductor ecosystem in the country.
This video has gone viral after the Union Cabinet approved the establishment of three more semiconductor plants – two by Tatas and one in Assam – that will start construction within the next 100 days.
In the video that has since gone viral, Vaishnaw can be seen scribbling on the whiteboard to explain in detail and length the blueprint for the semiconductor ecosystem. Vaishnaw can be see explaining the four important components – design, fabrication or fab, ATMP (assembly-testing-marking-packaging) and then the circuit or electronic manufacturing.
He can be seen saying that in order to support these components, the government is creating a talent pool. “The second-biggest thing we are doing is R&D,” he said, explaining the structure of the system where the most expensive tools are supplied by Cadence, Synopsys, and Siemens. These tools, called Electronic Design Automation or EDA tools are very expensive, costing up to Rs 10-15 crore for just one licence, explained the minister. He said that the government has taken these EDA tools and given them to 104 universities in the country.
Vaishnaw said that these tools have not just been given to the IITs but also to Tier II and Tier III universities. These universities will be able to expose their students to these live tools and not just the classrooms, he said. “The students can now take up a project and design a new mobile chip and make it, which will lead to new start-ups too. The talent that will emerge from there will be added to our overall talent pool of 300,000 engineers, which will then feed into Design, FAB, and ATMP aspects," he said.
The minister said that it is a comprehensive programme that requires the foundation to be strong. The entire process will take time but it will be solid work, said the minister. “What we have been able to achieve in two years, many countries have not been able to do in five years,” he said.
Vaishnaw spoke about Applied Materials too. “They have started setting up a plant in India. They are designing in India, manufacturing in India,” he added.
A video of Information Technology Minister Ashwini Vaishnaw explaining India’s semiconductor ecosystem on a whiteboard has gone viral. The video, over 4-minute long, shows Vaishnaw explaining his ministry working to create a robust semiconductor ecosystem in the country.
This video has gone viral after the Union Cabinet approved the establishment of three more semiconductor plants – two by Tatas and one in Assam – that will start construction within the next 100 days.
In the video that has since gone viral, Vaishnaw can be seen scribbling on the whiteboard to explain in detail and length the blueprint for the semiconductor ecosystem. Vaishnaw can be see explaining the four important components – design, fabrication or fab, ATMP (assembly-testing-marking-packaging) and then the circuit or electronic manufacturing.
He can be seen saying that in order to support these components, the government is creating a talent pool. “The second-biggest thing we are doing is R&D,” he said, explaining the structure of the system where the most expensive tools are supplied by Cadence, Synopsys, and Siemens. These tools, called Electronic Design Automation or EDA tools are very expensive, costing up to Rs 10-15 crore for just one licence, explained the minister. He said that the government has taken these EDA tools and given them to 104 universities in the country.
Vaishnaw said that these tools have not just been given to the IITs but also to Tier II and Tier III universities. These universities will be able to expose their students to these live tools and not just the classrooms, he said. “The students can now take up a project and design a new mobile chip and make it, which will lead to new start-ups too. The talent that will emerge from there will be added to our overall talent pool of 300,000 engineers, which will then feed into Design, FAB, and ATMP aspects," he said.
The minister said that it is a comprehensive programme that requires the foundation to be strong. The entire process will take time but it will be solid work, said the minister. “What we have been able to achieve in two years, many countries have not been able to do in five years,” he said.
Vaishnaw spoke about Applied Materials too. “They have started setting up a plant in India. They are designing in India, manufacturing in India,” he added.