The 3nm moonshot: Can India build the world’s most advanced chips by 2032?

For much of the past half-century, India remained outside the global semiconductor manufacturing mainstream, despite early efforts such as the Semiconductor Complex in Mohali and intermittent interest from multinational players like Intel. That inertia began to shift in December 2021, when the government unveiled the Rs 76,000-crore Semicon India programme, catalysed by the Covid-era chip shortage and a growing realisation that semiconductors had become central to economic and strategic security.

That ambition is now explicit. Speaking to Business Today on the sidelines of the World Economic Forum (WEF) in Davos, Electronics and IT Minister Ashwini Vaishnaw said, “By 2030 we should be doing 7-nanometer chips. By 2032, we should be doing 3-nanometer chips.”

It is a bold timeline, one that would require India to compress decades of manufacturing learning into less than a decade.

Until recently, semiconductor manufacturing was concentrated in a handful of countries, leaving most others dependent on imports. Since 2020, a new race has emerged, with nations such as India, Saudi Arabia, Vietnam and Mexico vying to build their first high-volume fabrication plants. Four years on, India stands out with a commercial fab already under construction.

The progress is tangible. Of the 10 approved projects, Tata Electronics’ Rs 91,000 crore fab in Dholera, in partnership with Taiwan’s Powerchip Semiconductor Manufacturing Corporation (PSMC), is set to begin trial production by 2027. Micron, CG Semi and Kaynes Semicon are preparing to start commercial operations at their packaging facilities this year. Beyond the India Semiconductor Mission, global suppliers are expanding their footprint: Applied Materials is setting up a $400-million engineering centre in Bengaluru, while Lam Research has committed Rs 10,000 crore toward semiconductor equipment manufacturing and ecosystem development in India.

Yet as India moves from policy intent to factory floors, a harder question remains: can it realistically manufacture advanced-node chips such as 3nm by 2032, or is the ambition outpacing industrial reality?

The power behind the world’s most advanced chips

In chip manufacturing, 3-nanometre (3nm) refers to one of the most advanced production technologies in use today. In simple terms, it determines how many transistors can be packed onto a chip, the smaller the number, the more powerful and energy-efficient it becomes. At 3nm, billions of transistors fit onto a chip smaller than a fingernail, delivering major gains in performance.

“3nm fabrication technology is synonymous with leadership products across industries,” says Danish Faruqui, CEO of Fab Economics. “Data centre processors and flagship chips from Nvidia, AMD, Intel, Google, Microsoft, Meta and Amazon, all of generative AI’s compute backbone, depend on 3nm capability.”

Only a handful of companies globally, notably Taiwan Semiconductor Manufacturing Company (TSMC) and Samsung Electronics, have so far succeeded in bringing 3nm chips into production.

The real barriers to India’s 3nm ambition

At the 3nm level, manufacturers face three major hurdles: equipment, yields and talent, each demanding enormous capital and time.

Advanced nodes such as 3nm require Extreme Ultraviolet (EUV) lithography to print the most intricate layers on a chip, while remaining layers rely on deep ultraviolet (DUV) systems.

“The production of 3nm chips is almost entirely dependent on EUV lithography, for which access is constrained,” says Manish Rawat, associate analyst at TechInsights. “EUV scanners are almost exclusively supplied by ASML, typically costing $150–200 million each, with complex process integration and specialised training required.”

EUV machines are among the most complex industrial systems ever built, roughly the size of a shipping container, containing over 10,000 precision-engineered components, and taking more than a year to manufacture and assemble.

Geopolitics adds another layer of complexity. Export controls increasingly shape access to advanced chipmaking tools, creating structural barriers for late entrants.

“EUV lithography is non-negotiable at 7nm and below and is a strategic dependency rather than a simple procurement issue,” explains Ashok Chandak, president of IESA and SEMI India. “While ASML is based in the Netherlands, a country India has strong relations with, EUV machines are also subject to strict export controls.”

Even with the right tools, achieving viable yields remains a major challenge. At 3nm, microscopic defects can render chips unusable, making early production costly and unpredictable.

Talent is another constraint. Advanced fabs require highly specialised engineers with decades of hands-on experience. While India has strong chip design talent, it lacks a deep pool of manufacturing veterans.

“The best bet is to hire technical folks, preferably NRIs, who have worked on every aspect of advanced-node technology, but it is not easy for many of them to agree to relocate,” says Arun Mampazhy, an independent semiconductor analyst who previously worked at GlobalFoundries.

The long road to 3nm

India plans to begin with 28nm production at Tata Electronics’ Dholera fab. While a logical entry point, it still places the country four technology generations behind the global frontier.

Moving from 28nm to 3nm typically takes 10–12 years, even for leading fabs, due to rising physics challenges, the transition from DUV to EUV lithography, and long yield-maturation cycles that require extensive data learning and tool calibration.

“In manufacturing, skipping nodes is not recommended,” Chandak says. “Each node acts as a learning platform for yield engineering, tool calibration and operational discipline.”

Rawat agrees. “Intermediate nodes like 22nm, 14nm and 7nm are critical platforms that integrate design rules, materials, lithography and defect control. Mastery of each node builds cumulative expertise. Skipping nodes jeopardises yield, escalates costs and strains talent development.”

TSMC took nearly three years to move from 5nm to stable, high-volume 3nm production, building on decades of experience. Samsung, too, struggled with yields and customer adoption, underscoring how difficult advanced-node scaling remains even for global leaders.

Learning from Intel

Intel’s own struggles offer a cautionary tale. “Intel was the first to receive high-NA EUV machines, but owning equipment alone does not help,” Mampazhy notes. After years of R&D on its 20A (2nm) process, Intel cancelled the node in 2024 and shifted resources to 18A (1.8nm).

“One needs experience using both current and previous-generation tools at scale,” Mampazhy says. He adds that Intel’s decision to keep its fabs closed to external customers for years also limited its learning across diverse chip designs and yield challenges.

For Indian fabs, that implies the importance of cultivating a broad customer base, even at modest volumes, to accelerate operational learning.

A marathon, not a sprint

India’s push toward 3nm marks a shift from being a peripheral player to aspiring for technological sovereignty. But advanced-node manufacturing is built on decades of experience, massive capital investment, deep talent pools and tightly integrated ecosystems.

While early signs are encouraging, with fabs taking shape, global suppliers committing capital and policy intent clearer than ever, the journey from 28nm to 3nm is not a single leap. It will require sustained momentum, consistent execution and long-term partnerships.

Whether India reaches 3nm by 2032 or later, what matters most is continuity. A more realistic benchmark may be achieving stable sub-10nm manufacturing and a mature semiconductor ecosystem. If that happens, 3nm becomes a question of when, not if. Losing focus now, however, risks repeating the false starts that set the country back for decades.