Tower Semiconductor’s potential $8-billion chip fabrication plant is a big win for India

One of the Top 10 global chip players, Israel’s Tower Semiconductor, has identified India as a semiconductor destination. It had done so in 2007 with ISMC (International Semiconductor Consortium), and again in 2022. But Intel’s attempt to acquire Tower (in a $5.4 billion deal that didn’t go through) had come into the way of India Semiconductor Mission and the Ministry of Electronics & IT approving the application. As per news reports, Tower has once again applied for a $8 billion chip fabrication plant. However, sources indicate Tower will need an investment partner for this proposal. In an exclusive conversation with Business Today, Danish Faruqui, CEO of Fab Economics, a US-based boutique semiconductor Fab/ATP site Greenfield advisory and implementation consultancy firm talks about what Tower Semi’s potential $8 billion semiconductor fabrication plan could mean for India.

Also read: Israel's Tower Semiconductor proposes $8 billion chip plant in India: Report

BT: What is your take on Tower’s potential $8 billion semiconductor fabrication plan in India?

Danish Faruqui: While it is a great win for India to have Tower’s $8 billion semiconductor fabrication plant, we need to put numbers in perspective to understand the magnitude of the move by Tower Semi better.

Intel Corporation was acquiring Tower Semi’s entire manufacturing footprint and design / IP capabilities in a $5.4 billion acquisition which eventually fell out after Intel’s relentless pursuit for 18 months to get regulatory approvals from every world region except China where it failed to get SAMR regulatory approval even after multiple timeline extensions for the deal closure.

Tower Semi’s global revenue hovers around $1.5 billion only. Therefore it is interesting to note that Tower Semi is planning for a $8 billion Fab in India – the largest investment ever in their history. The latest Fab capacity expansion project from Tower Semi was only $300 million investment to acquire and own 300mm wafer size Analog manufacturing capacity corridor Intel’s New Mexico Fab.

Thus, it is clear that Tower Semi definitely realises the success factors in investing in India which includes unparalleled capex-linked subsidy of 50% offered by ISM which has propelled Tower Semi to invest in India in unprecedented magnitude.

 In the year 2014, 2021 and 2023 Tower Semi has made fab capacity expansion investments in Japan, Italy and US – India $8 billion investment would be multifold the combined investment of Tower Semi across Japan, Italy and US over the last 10 years – that speaks volumes about the confidence international players are showing in India’s semiconductor roadmap. It’s an absolutely a big win for India – in magnitude hard to imagine for a player like Tower Semi.

So, it’s really an unprecedented win for India – one in which India does not need to worry about Manufacturing Grade Technology Licensing as Tower Semi is an established player.

What manufacturing process technologies can Tower Semi bring to India?

Per an analysis done by Fab Economics team across Tower Semi’s Manufacturing Technology Portfolio, corresponding current manufacturing capacity for each technology, ASP pricing trends forecasts and end market volume demands for India and globally suggest that Tower Semi’s $8 billion commitment could potentially be for 65nm and 40nm production technologies.

It will be a big win for India if Tower Semi decides to pursue 65nm technology in India as there are some radical differences between legacy 90nm and 65 nm technology – one being the DUV Lithography. 65nm manufacturing requires both 193nm and 248nm DUV lithography tools which will enable the India Fab site for faster and cheaper migration to the next advanced technology in future as the end market demands shift.

Why 65nm manufacturing process technologies is an important node for India?

We have developed India-specific decadal (2022-2033) demand and consumption forecasts across various end markets utilizing semiconductor components. Based on demand forecasts, 65 nm is a high-demand pareto node for India end markets across 65nm various derivatives technologies on Silicon and other specialty substrates like Silicon on Insulator.

To illustrate from a technical standpoint the USP of 65nm technology, it is important to note that gate widths do not shrink much going from 90nm to 65nm technology but the interconnects continue to shrink. 65nm CMOS process technology involves 8-11 metal layer scaled-down/shrink interconnects with low dielectric constant oxide layers causing the Metal Pitch and Poly Pitch to scale down considerably thus reducing chip area and chip cost/area as compared to 90mnm, as well as shortening the distance between transistors, leading to higher-performance devices of greater complexity when compared with 90nm and above nodes.

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